40 search results - page 4 / 8 » Optimization of Inductor Circuits via Geometric Programming |
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...
VTS
2006
IEEE
14 years 21 days ago
2006
IEEE
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
DAC
2005
ACM
13 years 8 months ago
2005
ACM
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...