104 search results - page 6 / 21 » Optimization of Industrial Applications with Hardware in the... |
DATE
2010
IEEE
14 years 15 days ago
2010
IEEE
—This paper presents reuse-aware modulo scheduling to maximizing stream reuse and improving concurrency for stream-level loops running on stream processors. The novelty lies in t...
DATE
2002
IEEE
14 years 11 days ago
2002
IEEE
Intra-iteration data reuse occurs when multiple array references exhibit data reuse in a single loop iteration. An optimizing compiler can exploit this reuse by clustering (in the...
BCS
2008
13 years 8 months ago
2008
Programs are fragile for many reasons, including software errors, partial failures, and network problems. One way to make software more robust is to design it from the start as a ...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...