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ICRA
2006
IEEE
93views Robotics» more  ICRA 2006»
14 years 1 months ago
A SVM-based Method for Engine Maintenance Strategy Optimization
— Due to the abundant application background, the optimization of maintenance problem has been extensively studied in the past decades. Besides the well-known difficulty of larg...
Qing-Shan Jia, Qianchuan Zhao
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 1 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
ICPADS
2006
IEEE
14 years 1 months ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
DATE
2004
IEEE
89views Hardware» more  DATE 2004»
13 years 11 months ago
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan ...
HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...