72 search results - page 7 / 15 » Optimization techniques for high-performance digital circuit... |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
FPGA
2010
ACM
13 years 5 months ago
2010
ACM
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
FPGA
1999
ACM
13 years 12 months ago
1999
ACM
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...