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ISQED
2006
IEEE
78views Hardware» more  ISQED 2006»
14 years 3 months ago
Simultaneous Statistical Delay and Slew Optimization for Interconnect Pipelines
Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. This paper develops closed-form models to predict the dela...
Andrew Havlir, David Z. Pan
ASPDAC
2001
ACM
78views Hardware» more  ASPDAC 2001»
14 years 24 days ago
Improved crosstalk modeling for noise constrained interconnect optimization
This paper presents a much improved, highly accurate yet efficient crosstalk noise model, the 2-
Jason Cong, David Zhigang Pan, Prasanna V. Sriniva...
INFOCOM
2007
IEEE
14 years 3 months ago
On the Optimality and Interconnection of Valiant Load-Balancing Networks
— The Valiant Load-Balancing (VLB) design has been proposed for a backbone network architecture that can efficiently provide predictable performance under changing traffic matr...
Moshe Babaioff, John Chuang
ISPD
1998
ACM
88views Hardware» more  ISPD 1998»
14 years 1 months ago
An efficient technique for device and interconnect optimization in deep submicron designs
In this paper, we formulate a new class of optimization problem, named the general CH-posynomial program, and reveal the general dominance property. We propose an efcient algorith...
Jason Cong, Lei He
ISQED
2002
IEEE
126views Hardware» more  ISQED 2002»
14 years 2 months ago
Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-...