1912 search results - page 244 / 383 » Optimizing interconnection policies |
149
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ISPD
2009
ACM
15 years 11 months ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
136
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GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
166
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DAC
2004
ACM
15 years 8 months ago
2004
ACM
In this paper, we investigate the problem of repeater insertion for low power under a given timing budget. We propose a novel repeater insertion algorithm to compute the optimal r...
122
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ALT
2008
Springer
16 years 1 months ago
2008
Springer
Abstract. We consider an upper confidence bound algorithm for Markov decision processes (MDPs) with deterministic transitions. For this algorithm we derive upper bounds on the onl...
122
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WG
2004
Springer
15 years 9 months ago
2004
Springer
We propose a two-phase heuristic for crossing reduction in circular layouts. While the first algorithm uses a greedy policy to build a good initial layout, an adaptation of the si...