13 search results - page 1 / 3 » PMOS breakdown effects on digital circuits - Modeling and an... |
VLSID
2007
IEEE
14 years 11 months ago
2007
IEEE
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS...
ASPDAC
2009
ACM
14 years 5 months ago
2009
ACM
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a major reliability concern in present-day digital circuit design. Further, with the recent usage of...
GLVLSI
2008
IEEE
14 years 5 months ago
2008
IEEE
With the scaling down of the CMOS technologies, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging process and the ...
DAC
2004
ACM
14 years 12 months ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
ICTAI
2002
IEEE
14 years 3 months ago
2002
IEEE
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...