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ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Improved on-chip router analytical power and area modeling
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
Andrew B. Kahng, Bill Lin, Kambiz Samadi
MICRO
2010
IEEE
128views Hardware» more  MICRO 2010»
13 years 5 months ago
Adaptive and Speculative Slack Simulations of CMPs on CMPs
Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, ...
TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
ISCA
2009
IEEE
159views Hardware» more  ISCA 2009»
14 years 2 months ago
End-to-end register data-flow continuous self-test
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
Javier Carretero, Pedro Chaparro, Xavier Vera, Jau...
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
14 years 1 months ago
Region-level approximate computation reuse for power reduction in multimedia applications
ABSTRACT Motivated by data value locality and quality tolerance present in multimedia applications, we propose a new micro-architecture, Region-level Approximate Computation Buffer...
Xueqi Cheng, Michael S. Hsiao