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» Packet-Based Input Test Data Compression Techniques
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ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 11 months ago
RunBasedReordering: A Novel Approach for Test Data Compression and Scan Power
As the large size of test data volume is becoming one of the major problems in testing System-on-a-Chip (SoC), several compression coding schemes have been proposed. Extended frequ...
Hao Fang, Chenguang Tong, Xu Cheng
DATE
2009
IEEE
87views Hardware» more  DATE 2009»
14 years 2 months ago
Efficient compression and handling of current source model library waveforms
—This paper describes a waveform compression technique suitable for the efficient utilization, storage and interchange of the emerging current source model (CSM) based cell libra...
Safar Hatami, Peter Feldmann, Soroush Abbaspour, M...
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 7 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
ATS
2003
IEEE
76views Hardware» more  ATS 2003»
14 years 19 days ago
STAGE: A Decoding Engine Suitable for Multi-Compressed Test Data
: Most of the recently discussed test stimulus data compression techniques are based on the low care bit densities found in typical scan test vectors. Data reduction primarily is a...
Bernd Koenemann
DATE
2007
IEEE
106views Hardware» more  DATE 2007»
14 years 1 months ago
Optimized integration of test compression and sharing for SOC testing
1 The increasing test data volume needed to test core-based System-on-Chip contributes to long test application times (TAT) and huge automatic test equipment (ATE) memory requireme...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...