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VLSID
2004
IEEE
146views VLSI» more  VLSID 2004»
14 years 8 months ago
CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 5 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
IROS
2009
IEEE
125views Robotics» more  IROS 2009»
14 years 2 months ago
A tale of two planners: Modular robotic planning with LDP
Abstract— LDP (Locally Distributed Predicates) is a distributed, high-level language for programming modular reconfigurable robot systems (MRRs). In this paper we present the im...
Michael DeRosa, Seth Copen Goldstein, Peter Lee, P...
DATE
2007
IEEE
130views Hardware» more  DATE 2007»
14 years 2 months ago
Development of on board, highly flexible, Galileo signal generator ASIC
Alcatel Alenia Space is deeply involved in the Galileo program at many stages. In particular, Alcatel Alenia Space has successfully designed and delivered the very first navigatio...
Louis Baguena, Emmanuel Liégeon, Alexandra ...
ICDM
2007
IEEE
166views Data Mining» more  ICDM 2007»
14 years 2 months ago
Mining Statistical Information of Frequent Fault-Tolerant Patterns in Transactional Databases
Constraints applied on classic frequent patterns are too strict and may cause interesting patterns to be missed. Hence, researchers have proposed to mine a more relaxed version of...
Ardian Kristanto Poernomo, Vivekanand Gopalkrishna...
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