356 search results - page 44 / 72 » Parallelizing time with polynomial circuits |
GECCO
2004
Springer
14 years 2 months ago
2004
Springer
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
RTCSA
2006
IEEE
14 years 3 months ago
2006
IEEE
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
ISMVL
2000
IEEE
14 years 1 months ago
2000
IEEE
A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (Shared reduced ordered Binary Decision Diagrams)...
CCGRID
2008
IEEE
14 years 3 months ago
2008
IEEE
In this paper we present a multicost algorithm for the joint time scheduling of the communication and computation resources that will be used by a task. The proposed algorithm sel...