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» Parametric Fault Simulation and Test Vector Generation
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VTS
2006
IEEE
93views Hardware» more  VTS 2006»
14 years 1 months ago
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...
Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram
TSP
2010
13 years 2 months ago
A new parametric GLRT for multichannel adaptive signal detection
A parametric generalized likelihood ratio test (GLRT) for multichannel signal detection in spatially and temporally colored disturbance was recently introduced by modeling the dist...
Pu Wang, Hongbin Li, Braham Himed
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
14 years 1 months ago
Functional test generation using property decompositions for validation of pipelined processors
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
Heon-Mo Koo, Prabhat Mishra
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 11 months ago
Improving coverage analysis and test generation for large designs
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
Jules P. Bergmann, Mark Horowitz
ISSRE
2000
IEEE
13 years 11 months ago
Evaluation of Regressive Methods for Automated Generation of Test Trajectories
Automated generation of test cases is a prerequisite for fast testing. Whereas the research has addressed the creation of individual test points, test trajectoiy generation has at...
Brian J. Taylor, Bojan Cukic