372 search results - page 74 / 75 » Performance Studies of a Parallel Prolog Architecture |
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
VEE
2009
ACM
14 years 3 months ago
2009
ACM
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
MOBICOM
2003
ACM
14 years 1 months ago
2003
ACM
We consider a two-tiered Wireless Sensor Network (WSN) consisting of sensor clusters deployed around strategic locations and base-stations (BSs) whose locations are relatively fl...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...