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» Performance and Functional Verification of Microprocessors
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DAC
1994
ACM
14 years 18 days ago
The Design of High-Performance Microprocessors at Digital
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
Thomas F. Fox
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 5 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
IMSCCS
2006
IEEE
14 years 2 months ago
Verification Environment for a SCMP Architecture
The computer architecture of Single-chip multiprocessor (SCMP) is one of important research topics in developing the next-generation of computer hardware. A verification environme...
Wenbin Yao, Nianmin Yao, Shaobin Cai, Jun Ni
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
14 years 24 days ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
14 years 8 days ago
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocesso
Abstract - We propose an integrated archltectural/physicdplanning approach named priority assignment optimization to mioimize the current surge in high performance power eifkient c...
Yiran Chen, Kaushik Roy, Cheng-Kok Koh