108 search results - page 18 / 22 » Performance and Power Impact of Issue-width in Chip-Multipro... |
ICC
2009
IEEE
14 years 2 months ago
2009
IEEE
—We consider a new generation of COTS Software Routers (SRs), able to effectively exploit multi-Core/CPU HW platforms. Our main objective is to evaluate and to model the impact o...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...