192 search results - page 33 / 39 » Pipelined FPGA Adders |
FPL
2008
Springer
13 years 9 months ago
2008
Springer
Due to continuous improvements in the resources available on FPGAs, it is becoming increasingly possible to accelerate floating point algorithms. The solution of a system of linea...
ASAP
2010
IEEE
13 years 9 months ago
2010
IEEE
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
ERSA
2006
13 years 9 months ago
2006
- In this paper, we present a prototype FPGA design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourie...
JUCS
2010
13 years 6 months ago
2010
: Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...