237 search results - page 23 / 48 » Policies for Dynamic Clock Scheduling |
HPCA
2008
IEEE
14 years 10 months ago
2008
IEEE
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
ISCA
2008
IEEE
14 years 4 months ago
2008
IEEE
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
INFOCOM
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract-- In this paper, we consider the problem of optimal control for throughput utility maximization in cognitive radio networks with dynamic user arrivals and departures. The ...
ISCA
2000
IEEE
14 years 2 months ago
2000
IEEE
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
CONCUR
2003
Springer
14 years 3 months ago
2003
Springer
Abstract. Digital signal processing and control (DSPC) tools allow application developers to assemble systems by connecting predefined components in signal–flow graphs and by h...