Sciweavers

296 search results - page 11 / 60
» Power Estimation in Sequential Circuits
Sort
View
ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
13 years 6 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
14 years 2 months ago
Accurate temperature-dependent integrated circuit leakage power estimation is easy
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Ya...
ICCAD
1994
IEEE
121views Hardware» more  ICCAD 1994»
14 years 6 days ago
A cell-based power estimation in CMOS combinational circuits
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen
TVLSI
1998
81views more  TVLSI 1998»
13 years 7 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to ef...
Chuan-Yu Wang, Kaushik Roy
ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
14 years 8 days ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm