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» Power Estimation in Sequential Circuits
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CODES
2004
IEEE
13 years 11 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
ASPDAC
1999
ACM
100views Hardware» more  ASPDAC 1999»
14 years 10 days ago
Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods
We propose a new technique called node sampling to speed up the probability-based power estimation methods. It samples and processes only a small portion of total nodes to estimat...
Hoon Choi, Hansoo Kim, In-Cheol Park, Seung Ho Hwa...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
14 years 2 months ago
Architectural and technology influence on the optimal total power consumption
In this paper, an approximated closed-form total power consumption equation for circuits working at their optimal supply and threshold voltage is presented. Comparisons of this fo...
Christian Schuster, Jean-Luc Nagel, Christian Pigu...
DAC
1996
ACM
14 years 5 days ago
Improving the Efficiency of Power Simulators by Input Vector Compaction
Accurate power estimation is essential for low power digital CMOS circuit design. Power dissipation is input pattern dependent. To obtain an accurate power estimate, a large input...
Chi-Ying Tsui, Radu Marculescu, Diana Marculescu, ...
ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
14 years 4 months ago
Interconnect-aware high-level synthesis for low power
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
Lin Zhong, Niraj K. Jha