296 search results - page 47 / 60 » Power Estimation in Sequential Circuits |
DSN
2005
IEEE
14 years 1 months ago
2005
IEEE
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...