979 search results - page 9 / 196 » Power Macromodeling for High Level Power Estimation |
ISLPED
2003
ACM
14 years 27 days ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
This work is a contribution to high level synthesis for low power systems. While device feature size decreases, interconnect power becomes a dominating factor. Thus it is importan...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper addresses the problem of chip level thermal profile estimation using runtime temperature sensor readings. We address the challenges of a) availability of only a few t...
ICASSP
2008
IEEE
14 years 2 months ago
2008
IEEE
We consider estimation of the noise spectral variance from speech signals contaminated by highly nonstationary noise sources. In each time frame, for each frequency bin, the noise...