111 search results - page 10 / 23 » Power Optimization in Current Mode Circuits |
DATE
1999
IEEE
14 years 5 days ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to con...
DAC
1999
ACM
14 years 6 days ago
1999
ACM
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
ISCAS
2003
IEEE
14 years 1 months ago
2003
IEEE
Bulk multi-walled carbon nanotube (MWNT) were successfully and repeatably manipulated by AC electrophoresis to form resistive elements between Au microelectrodes and were demonstr...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...