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» Power Optimization in Current Mode Circuits
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DAC
2010
ACM
13 years 10 months ago
A probabilistic and energy-efficient scheduling approach for online application in real-time systems
This work considers the problem of minimizing the power consumption for real-time scheduling on processors with discrete operating modes. We provide a model for determining the ex...
Thorsten Zitterell, Christoph Scholl
VLSID
2002
IEEE
131views VLSI» more  VLSID 2002»
14 years 7 months ago
Divide-and-Conquer IDDQ Testing for Core-Based System Chips
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
C. P. Ravikumar, Rahul Kumar
LCN
2003
IEEE
14 years 9 days ago
Performance Analysis of IP Paging Protocol in IEEE 802.11 Networks
Recently, IEEE 802.11 wireless networks have been widely deployed in public areas for mobile Internet services. In the public wireless LAN systems, paging function is necessary to...
Sangheon Pack, Ved Kafle, Yanghee Choi
ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 9 days ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou