430 search results - page 26 / 86 » Power Optimized Combinational Logic Design |
ICCAD
1991
IEEE
14 years 15 days ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
CORR
2008
Springer
13 years 9 months ago
2008
Springer
The goal of combining beamforming and space-time coding is to obtain full-diversity order and to provide additional received power (array gain) compared to conventional space-time...
ASPDAC
2008
ACM
13 years 11 months ago
2008
ACM
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
ISLPED
1995
ACM
14 years 15 days ago
1995
ACM
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
ICCAD
1998
IEEE
14 years 1 months ago
1998
IEEE
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...