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» Power Optimized Combinational Logic Design
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DAC
2010
ACM
13 years 10 months ago
Adaptive and autonomous thermal tracking for high performance computing systems
Many DTM schemes rely heavily on the accurate knowledge of the chip's dynamic thermal state to make optimal performance/ temperature trade-off decisions. This information is ...
Yufu Zhang, Ankur Srivastava
DAC
2005
ACM
14 years 9 hour ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 10 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
SEBD
2007
121views Database» more  SEBD 2007»
13 years 11 months ago
Query Answering in Expressive Variants of DL-Lite
The use of ontologies in various application domains, such as Data Integration, the Semantic Web, or ontology-based data management, where ontologies provide the access to large am...
Alessandro Artale, Diego Calvanese, Roman Kontchak...
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 2 months ago
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...