734 search results - page 26 / 147 » Power balanced pipelines |
FPL
2004
Springer
14 years 2 months ago
2004
Springer
This paper investigates experimentally the quantitative impact of pipelining on energy per operation for two representative FPGA devices: a 0.13µm CMOS high density/high speed FPG...
DAC
1994
ACM
14 years 22 days ago
1994
ACM
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
ICWN
2008
13 years 10 months ago
2008
- Sensor and actor networks are used to monitor and control pipeline infrastructures. This paper discusses and compares different sensor and actor network architectures for water, ...
DAC
1996
ACM
14 years 23 days ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...