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734
search results - page 9 / 147
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Power balanced pipelines
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VLSID
2006
IEEE
140
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VLSI
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VLSID 2006
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Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
14 years 9 months ago
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web.mit.edu
A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interco...
Ajay Joshi, Vinita V. Deodhar, Jeffrey A. Davis
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DATE
2009
IEEE
92
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Hardware
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DATE 2009
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Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing
14 years 3 months ago
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www.date-conference.com
José Ángel Díaz-Madrid, H. Ne...
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21
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GLOBECOM
2008
IEEE
98
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Communications
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GLOBECOM 2008
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Multi-Way Pipelining for Power-Efficient IP Lookup
14 years 3 months ago
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cial.csie.ncku.edu.tw
Weirong Jiang, Viktor K. Prasanna
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SLIP
2004
ACM
63
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Computer Networks
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SLIP 2004
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A low power approach to system level pipelined interconnect design
14 years 2 months ago
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Vikas Chandra, Anthony Xu, Herman Schmit
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ISLPED
1996
ACM
143
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Hardware
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ISLPED 1996
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Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer
14 years 22 days ago
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www.cecs.uci.edu
Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Ko...
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