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» Power distribution techniques for dual VDD circuits
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DATE
2009
IEEE
93views Hardware» more  DATE 2009»
14 years 2 months ago
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Ha...
TCAD
2008
119views more  TCAD 2008»
13 years 7 months ago
Bridging Fault Test Method With Adaptive Power Management Awareness
Abstract--A key design constraint of circuits used in handheld devices is the power consumption, mainly due to battery life limitations. Adaptive power management (APM) techniques ...
S. Saqib Khursheed, Urban Ingelsson, Paul M. Rosin...
DAC
2004
ACM
14 years 8 months ago
Statistical optimization of leakage power considering process variations using dual-Vth and sizing
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
Ashish Srivastava, Dennis Sylvester, David Blaauw
GLVLSI
2005
IEEE
144views VLSI» more  GLVLSI 2005»
14 years 1 months ago
On-chip power distribution grids with multiple supply voltages for high performance integrated circuits
—On-chip power distribution grids with multiple supply voltages are discussed in this paper. Two types of interdigitated and paired power distribution grids with multiple supply ...
Mikhail Popovich, Eby G. Friedman, Michael Sotman,...
ICES
2001
Springer
107views Hardware» more  ICES 2001»
13 years 12 months ago
Polymorphic Electronics
This paper introduces the concept of polymorphic electronics (polytronics) –referring to electronics with superimposed built-in functionality. A function change does not require ...
Adrian Stoica, Ricardo Salem Zebulum, Didier Keyme...