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» Power levels and packet lengths in random multiple access
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ICC
2000
IEEE
14 years 5 days ago
Synchronizability of General Periodic Pattern Signals
— In this paper1 an optimum and sub-optimum maximum likelihood (ML) rule for joint frame and carrier frequency offset estimation are derived, which rely on the transmission of a...
Branimir Stantchev, Gerhard Fettweis
CLUSTER
2005
IEEE
14 years 1 months ago
Fast Query Processing by Distributing an Index over CPU Caches
Data intensive applications on clusters often require requests quickly be sent to the node managing the desired data. In many applications, one must look through a sorted tree str...
Xiaoqin Ma, Gene Cooperman
TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
VLSISP
2008
106views more  VLSISP 2008»
13 years 7 months ago
Architecture Considerations for Multi-Format Programmable Video Processors
Many different video processor architectures exist. Its architecture gives a processor strength for a particular application. Hardwired logic yields the best performance/cost, but ...
Jonah Probell
DAC
2003
ACM
14 years 8 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...