85 search results - page 5 / 17 » Practical placement and routing techniques for analog circui... |
DAC
2000
ACM
13 years 11 months ago
2000
ACM
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorpl...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
The advent of strong multi-level partitioners has made topdown min-cut placers a favored choice for modern placer implementations. We examine terminal propagation, an important st...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
DATE
2003
IEEE
14 years 11 days ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...