47 search results - page 4 / 10 » Precomputation-based Guarding for Dynamic and Leakage Power ... |
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limi...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
DATE
2005
IEEE
14 years 22 days ago
2005
IEEE
Power dissipation during test is a major challenge in testing integrated circuits. Dynamic power has been the dominant part of power dissipation in CMOS circuits, however, in futu...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents a method of dynamic voltage scaling (DVS) that tackles both switching and leakage power with combined Vdd/Vbs scaling and gives minimum average energy consumpt...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...