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» Predictable Embedded Multiprocessor System Design
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CASES
2007
ACM
13 years 11 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 7 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh
CODES
2007
IEEE
14 years 1 months ago
A data protection unit for NoC-based architectures
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
RTAS
2010
IEEE
13 years 5 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
CODES
2006
IEEE
14 years 1 months ago
Bounded arbitration algorithm for QoS-supported on-chip communication
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
Mohammad Abdullah Al Faruque, Gereon Weiss, Jö...