385 search results - page 1 / 77 » Prefetch-aware shared resource management for multi-core sys... |
MICRO
2008
IEEE
14 years 5 months ago
2008
IEEE
Existing DRAM controllers employ rigid, non-adaptive scheduling and buffer management policies when servicing prefetch requests. Some controllers treat prefetch requests the same ...
RTAS
2008
IEEE
14 years 5 months ago
2008
IEEE
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
ICCCN
2008
IEEE
14 years 5 months ago
2008
IEEE
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors—high-speed networking technologies and multi...
CPHYSICS
2010
13 years 11 months ago
2010
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
ISCA
2011
IEEE
13 years 2 months ago
2011
IEEE
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...