154 search results - page 7 / 31 » Process Scheduling for Performance Estimation and Synthesis ... |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
TCAD
2010
13 years 2 months ago
2010
For real-time applications, it is necessary to estimate the worst-case performance early in the design process without actual hardware implementation. While the non-preemptive task...
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
Power-related issues have become important considerations in current generation microprocessor design. One of these issues is that of elevated on-chip temperatures. This has an ad...
ISLPED
2003
ACM
14 years 22 days ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...