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» Process variation dimension reduction based on SVD
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VLSID
2010
IEEE
211views VLSI» more  VLSID 2010»
13 years 11 months ago
A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dh...
ENGL
2007
101views more  ENGL 2007»
13 years 7 months ago
Multiresolution Knowledge Mining using Wavelet Transform
— Most research in Knowledge Mining deal with the basic models like clustering, classification, regression, association rule mining and so on. In the process of quest for knowled...
R. Pradeep Kumar, P. Nagabhushan
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 1 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
ICIP
2006
IEEE
14 years 9 months ago
A Minimum-Entropy Procedure for Robust Motion Estimation
We focus on motion estimation using a block matching approach and suggest using a minimum-entropy criterion. Many entropy-based estimation procedures exist, such as plug-in estima...
Sylvain Boltz, Eric Wolsztynski, Eric Debreuve, Er...
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
14 years 2 months ago
Random sampling of moment graph: a stochastic Krylov-reduction algorithm
In this paper we introduce a new algorithm for model order reduction in the presence of parameter or process variation. Our analysis is performed using a graph interpretation of t...
Zhenhai Zhu, Joel R. Phillips