39 search results - page 5 / 8 » Processor Acceleration Through Automated Instruction Set Cus... |
DATE
2005
IEEE
14 years 18 days ago
2005
IEEE
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
HPCA
2009
IEEE
14 years 1 months ago
2009
IEEE
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
SASP
2008
IEEE
14 years 1 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
DATE
2003
IEEE
14 years 8 days ago
2003
IEEE
This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are incr...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...