In this paper we study the timing behaviour of streaming applications running on a multiprocessor architecture. Dependencies are derived between the application throughput and the...
Nikolay Kavaldjiev, Gerard J. M. Smit, Pierre G. J...
Designers of FPGA-based systems are increasingly including soft processors—processors implemented in programmable logic—in their designs. Any combination of area, clock freque...
This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
Daniel J. Deleganes, Micah Barany, George Geannopo...
High performance SoC requires nonblocking interconnections between an array of processors built on one chip. With the advent of deep sub-micron technologies, switches are becoming...
Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Che...