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» Pseudo-Exhaustive Testing of Sequential Circuits
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ICCAD
1997
IEEE
125views Hardware» more  ICCAD 1997»
14 years 3 days ago
A deductive technique for diagnosis of bridging faults
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
Srikanth Venkataraman, W. Kent Fuchs
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
14 years 4 months ago
Scalable and scalably-verifiable sequential synthesis
This paper describes an efficient implementation of an effective sequential synthesis operation that uses induction to detect and merge sequentially-equivalent nodes. State-encodi...
Alan Mishchenko, Michael L. Case, Robert K. Brayto...
DAC
2005
ACM
13 years 9 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
14 years 4 months ago
Accurate Diagnosis of Multiple Faults
In this paper, we propose a diagnostic test generation method in conjunction with an efficient sequential SAT-based diagnosis procedure to precisely identify multiple defective si...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
13 years 11 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar