Sciweavers

694 search results - page 86 / 139
» Quantum associative memory
Sort
View
CGO
2010
IEEE
14 years 3 months ago
Towards program optimization through automated analysis of numerical precision
Reducing the arithmetic precision of a computation has real performance implications, including increased speed, decreased power consumption, and a smaller memory footprint. For s...
Michael D. Linderman, Matthew Ho, David L. Dill, T...
EMSOFT
2009
Springer
14 years 3 months ago
Probabilistic modeling of data cache behavior
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
Vinayak Puranik, Tulika Mitra, Y. N. Srikant
DATE
2007
IEEE
124views Hardware» more  DATE 2007»
14 years 3 months ago
Worst-case design and margin for embedded SRAM
An important aspect of Design for Yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previousl...
Robert C. Aitken, Sachin Idgunji
HIPC
2004
Springer
14 years 2 months ago
Lock-Free Parallel Algorithms: An Experimental Study
Abstract. Lock-free shared data structures in the setting of distributed computing have received a fair amount of attention. Major motivations of lock-free data structures include ...
Guojing Cong, David A. Bader
FPL
2003
Springer
100views Hardware» more  FPL 2003»
14 years 1 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...