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VLSID
2002
IEEE
130views VLSI» more  VLSID 2002»
14 years 9 months ago
Using Randomized Rounding to Satisfy Timing Constraints of Real-Time Preemptive Tasks
In preemptive real-time systems, a tighter estimate of the Worst Case Response Time(WCRT) of the tasks can be obtained if the layout of the tasks in memory is included in the esti...
Anupam Datta, Sidharth Choudhury, Anupam Basu
ICCD
2003
IEEE
167views Hardware» more  ICCD 2003»
14 years 5 months ago
Virtual Page Tag Reduction for Low-power TLBs
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...
Peter Petrov, Alex Orailoglu
DATE
2006
IEEE
73views Hardware» more  DATE 2006»
14 years 2 months ago
Minimizing test power in SRAM through reduction of pre-charge activity
In this paper we analyze the test power of SRAM memories and demonstrate that the full functional precharge activity is not necessary during test mode because of the predictable a...
Luigi Dilillo, Paul M. Rosinger, Bashir M. Al-Hash...
IJCNN
2006
IEEE
14 years 2 months ago
SOM-Based Sparse Binary Encoding for AURA Classifier
—The AURA k-Nearest Neighbour classifier associates binary input and output vectors, forming a compact binary Correlation Matrix Memory (CMM). For a new input vector, matching ve...
Simon O'Keefe
ASPDAC
2006
ACM
97views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Object duplication for improving reliability
— Soft errors are becoming a common problem in current systems due to the scaling of technology that results in the use of smaller devices, lower voltages, and power-saving techn...
Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykr...