214 search results - page 33 / 43 » Quasi-Resonant Interconnects: A Low Power Design Methodology |
DAC
2007
ACM
14 years 9 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
FPGA
2003
ACM
14 years 1 months ago
2003
ACM
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
ISVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly differe...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...