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» Quasi-Resonant Interconnects: A Low Power Design Methodology
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DAC
2002
ACM
14 years 8 months ago
Analysis of power consumption on switch fabrics in network routers
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
Terry Tao Ye, Giovanni De Micheli, Luca Benini
PATMOS
2000
Springer
13 years 11 months ago
Dynamic Memory Design for Low Data-Retention Power
Abstract. The emergence of data-intensive applications in mobile environments has resulted in portable electronic systems with increasingly large dynamic memories. The typical oper...
Joohee Kim, Marios C. Papaefthymiou
ISLPED
1998
ACM
155views Hardware» more  ISLPED 1998»
14 years 3 days ago
Low threshold CMOS circuits with low standby current
Multi-Voltage CMOS MVCMOS is a design methodology for very low power supply voltages that uses low-threshold transistors in series with the supply rails. The control voltages on...
Mircea R. Stan
CCECE
2006
IEEE
14 years 1 months ago
Low-Voltage Low-Power Low-Noise Amplifier for Wireless Sensor Networks
—This work presents a methodology for designing CMOS low-voltage low-power low-noise amplifiers (LNAs) based on the inductively degenerated common-source topology. To demonstrate...
Derek Ho, Shahriar Mirabbasi
FPL
2008
Springer
91views Hardware» more  FPL 2008»
13 years 9 months ago
Power efficient DSP datapath configuration methodology for FPGA
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
Stephen McKeown, Roger Woods, John McAllister