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ICCD
2005
IEEE
169views Hardware» more  ICCD 2005»
14 years 6 months ago
ALLCN: An Automatic Logic-to-Layout Tool for Carbon Nanotube Based Nanotechnology
— Since rapid progress has been made in device improvement and integration of small carbon nanotube fieldeffect transistors (CNFETs) circuits, the time has come for developing c...
Wei Zhang, Niraj K. Jha
IV
2005
IEEE
134views Visualization» more  IV 2005»
14 years 3 months ago
Automatic Layout of Project Plans Using a Metro Map Metaphor
In this paper we describe a tool to improve interfunctional communication of project plans by displaying them as a metro map. Our tool automatically lays out plans using a multicr...
Jonathan M. Stott, Peter Rodgers, Remo Aslak Burkh...
GLVLSI
2009
IEEE
128views VLSI» more  GLVLSI 2009»
14 years 1 months ago
Impact of lithography-friendly circuit layout
Current lithography techniques use a light wavelength of 193nm to print sub-65nm features. This introduces process variations which cause mismatches between desired and actual waf...
Pratik J. Shah, Jiang Hu
DATE
2008
IEEE
118views Hardware» more  DATE 2008»
13 years 11 months ago
Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices
Advanced MOSFETs such as Strained Silicon (SS) devices have emerged as critical enablers to keep Moore's law on track for sub100nm technologies. Use of Strained Silicon devic...
Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
CVPR
2007
IEEE
14 years 11 months ago
3D LayoutCRF for Multi-View Object Class Recognition and Segmentation
We introduce an approach to accurately detect and segment partially occluded objects in various viewpoints and scales. Our main contribution is a novel framework for combining obj...
Derek Hoiem, Carsten Rother, John M. Winn