152 search results - page 24 / 31 » Reducing dynamic compilation overhead by overlapping compila... |
DAC
2007
ACM
14 years 9 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
CODES
2007
IEEE
14 years 17 days ago
2007
IEEE
For the worst-case execution time (WCET) analysis, especially loops are an inherent source of unpredictability and loss of precision. This is caused by the difficulty to obtain sa...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
DAGSTUHL
2006
13 years 10 months ago
2006
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is ...