201 search results - page 14 / 41 » Reducing the number of clock variables of timed automata |
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
ISCAS
2003
IEEE
14 years 25 days ago
2003
IEEE
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
ICCD
1991
IEEE
13 years 11 months ago
1991
IEEE
This article proposes a completion-detection method for efficiently implementing Boolean functions as self-timed logic structures. Current-Sensing Completion Detection, CSCD, allow...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
IJFCS
2006
13 years 7 months ago
2006
For successful software verification, model checkers must be capable of handling a large number of program variables. Traditional, BDD-based model checking is deficient in this re...