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» Reliability Modeling of Fault Tolerant Control Systems
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CODES
2007
IEEE
14 years 2 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 4 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
MSWIM
2006
ACM
14 years 1 months ago
Performance modeling of critical event management for ubiquitous computing applications
A generic theoretical framework for managing critical events in ubiquitous computing systems is presented. The main idea is to automatically respond to occurrences of critical eve...
Tridib Mukherjee, Krishna M. Venkatasubramanian, S...
IPPS
1999
IEEE
14 years 2 days ago
An Adaptive, Fault-Tolerant Implementation of BSP for JAVA-Based Volunteer Computing Systems
Abstract. In recent years, there has been a surge of interest in Javabased volunteer computing systems, which aim to make it possible to build very large parallel computing network...
Luis F. G. Sarmenta
HPCA
2007
IEEE
14 years 8 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...