Direct volume rendering techniques map volumetric attributes (e.g., density, gradient magnitude, etc.) to visual styles. Commonly this mapping is specified by a transfer function. ...
Peter Rautek, Stefan Bruckner, M. Eduard Grölle...
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
This paper presents a novel instruction encoding generation technique for use in architecture exploration for application specific processors. The underlying exploration methodolo...
Achim Nohl, Volker Greive, Gunnar Braun, Andreas H...