60 search results - page 7 / 12 » Retiming with Interconnect and Gate Delay |
ISPD
1998
ACM
13 years 11 months ago
1998
ACM
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDel...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Field Programmable Gate Arrays (FPGAs) are important hardware platforms in various applications due to increasing design complexity and mask costs. However, as CMOS process techno...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...