167 search results - page 20 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ISLPED
2003
ACM
14 years 23 days ago
2003
ACM
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Boolean Satisfiability (SAT) solvers are popular engines used throughout the verification world. Bounded sequential problems such as bounded model checking and bounded sequentia...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
ARITH
2005
IEEE
13 years 9 months ago
2005
IEEE
Hash functions are an important cryptographic primitive. They are used to obtain a fixed-size fingerprint, or hash value, of an arbitrary long message. We focus particularly on ...