167 search results - page 6 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ISQED
2008
IEEE
14 years 1 months ago
2008
IEEE
Correct input/output behavior of circuits in presence of internal malfunctions becomes more and more important. But reliable and efficient methods to measure this robustness are ...
ISLPED
2000
ACM
13 years 11 months ago
2000
ACM
This paper presents a state assignment technique called priority encoding which uses multi-code assignment plus clock gating to reduce power dissipation in sequential circuits. Th...
ASPDAC
2000
ACM
13 years 12 months ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
MEDIAFORENSICS
2010
13 years 9 months ago
2010
This paper considers the security aspect of the robust zero-bit watermarking technique `Broken Arrows'(BA),1 which was invented and tested for the international challenge BOW...